2-6 Oct 2017
Vienna, Austria
CALL FOR PAPERS International Conference on Formal Methods in Computer-Aided Design (FMCAD) Vienna, Austria, October 2-6, 2017 http://www.fmcad.org/FMCAD17 IMPORTANT DATES Abstract Submission: May 01, 2017 Paper Submission: May 08, 2017 Author Response Period: June 19-23, 2017 Author Notification: July 14, 2017 Camera-Ready Version: Aug 09, 2017 All deadlines are 11:59 pm AoE (Anywhere on Earth) FMCAD Tutorial Day: October 2, 2017 FMCAD Regular Program: October 3-6, 2017 Part of the FMCAD 2017 program: - Symposium in memoriam of Helmut Veith - FMCAD Student Forum CONFERENCE SCOPE AND PUBLICATION FMCAD 2017 is the seventeenth in a series of conferences on the theory and applications of formal methods in hardware and system verification. FMCAD provides a leading forum to researchers in academia and industry for presenting and discussing groundbreaking methods, technologies, theoretical results, and tools for reasoning formally about computing systems. FMCAD covers formal aspects of computer-aided system design including verification, specification, synthesis, and testing. FMCAD employs a rigorous peer-review process. Accepted papers are distributed through both ACM and IEEE digital libraries. In addition, published articles are made available freely on the conference page; the authors retain the copyright. There are no publication fees. At least one of the authors is required to register for the conference and present the accepted paper. A small number of outstanding FMCAD submissions will be considered for inclusion in a Special Issue of the journal on Formal Methods in System Design (FMSD). TOPICS OF INTEREST FMCAD welcomes submission of papers reporting original research on advances in all aspects of formal methods and their applications to computer- aided design. Topics of interest include (but are not limited to): -- Model checking, theorem proving, equivalence checking, abstraction and reduction, compositional methods, decision procedures at the bit- and word-level, probabilistic methods, combinations of deductive methods and decision procedures. -- Synthesis and compilation for computer system descriptions, modeling, specification, and implementation languages, formal semantics of languages and their subsets, model-based design, design derivation and transformation, correct-by-construction methods. -- Application of formal and semi-formal methods to functional and non-functional specification and validation of hardware and software, including timing and power modeling, verification of computing systems on all levels of abstraction, system-level design and verification for embedded systems, cyber-physical systems, automotive systems and other safety-critical systems, hardware-software co-design and verification, and transaction-level verification. -- Experience with the application of formal and semi-formal methods to industrial-scale designs; tools that represent formal verification enablement, new features, or a substantial improvement in the automation of formal methods. -- Application of formal methods to verifying safety, correctness, connectivity, and security properties of networks and distributed systems. SUBMISSIONS Submissions must be made electronically in PDF format via EasyChair: https://easychair.org/conferences/?conf=fmcad17 Two categories of papers are invited: Regular papers, and Tool & Case Study papers. Regular papers are expected to offer novel foundational ideas, theoretical results, or algorithmic improvements to existing methods, along with experimental impact validation where applicable. Tool & Case Study papers are expected to report on the design, implementation or use of verification (or related) technology in a practically relevant context (which need not be industrial), and its impact on design processes. Both Regular and Tool & Case study papers must use the IEEE Transactions format on letter-size paper with a 10-point font size. Regular papers can be up to 8 pages in length and tool papers up to 4 pages, although there is no requirement to fill all pages in either category. Authors will be required to select the appropriate paper category at abstract submission time. Submissions may contain an optional appendix, which will not appear in the final version of the paper. The reviewers should be able to assess the quality and the relevance of the results in the paper without reading the appendix. Submissions in both categories must contain original research that has not been previously published, nor is concurrently submitted for publication. Any partial overlap with published or concurrently submitted papers must be clearly indicated. If experimental results are reported, authors are strongly encouraged to provide the reviewers access to their data at submission time, so that results can be independently verified. FMCAD 2017 COMMITTEES PROGRAM CHAIRS: Daryl Stewart, ARM Georg Weissenbacher, TU Wien STUDENT FORUM CHAIR: Keijo Heljanko, Aalto University LOCAL ARRANGEMENTS CHAIR & WEBMASTER: Jens Katelaan, TU Wien PUBLICATION CHAIR: Mitra Tabaei Befrouei, TU Wien PROGRAM COMMITTEE Jade Alglave University College London and Microsoft Research Christel Baier Technical University of Dresden Roderick Bloem Graz University of Technology Hana Chockler King's College London Andreas Griesmayer ARM Arie Gurfinkel University of Waterloo Ziyad Hanna Cadence Design Systems Fei He Tsinghua University Alan J. Hu University of British Columbia Warren A. Hunt Jr. University of Texas Alexander Ivrii IBM Barbara Jobstmann EPFL and Cadence Design Systems Dejan Jovanovic SRI International Gerwin Klein Data61 and UNSW Australia Igor Konnov TU Wien Rebekah Leslie-Hurd Intel Ines Lynce INESC-ID/IST, Universidade de Lisboa Ken McMillan Microsoft Research Charles Morisset Newcastle University Lee Pike Galois Inc. Mitra Purandare IBM Ajitha Rajan University of Edinburgh Ahmed Rezine Link??ping University Sean Safarpour Synopsys Roopsha Samanta Purdue University Martina Seidl Johannes Kepler University Linz Natasha Sharygina USI Lugano Anna Slobodova Centaur Technology Ana Sokolova University of Salzburg Daryl Stewart ARM Murali Talupur FormalSim Michael Tautschnig Queen Mary University of London Thomas Wahl Northeastern University Chao Wang University of Southern California Georg Weissenbacher TU Wien Florian Zuleger TU Wien FMCAD STEERING COMMITTEE Armin Biere, Johannes Kepler University in Linz, Austria Alan Hu, University of British Columbia, Canada Warren A. Hunt Jr., University of Texas at Austin, USA Vigyan Singhal, Oski Tech -- [LOGIC] mailing list http://www.dvmlg.de/mailingliste.html Archive: http://www.illc.uva.nl/LogicList/ provided by a collaboration of the DVMLG, the Maths Departments in Bonn and Hamburg, and the ILLC at the Universiteit van Amsterdam