Logic List Mailing Archive

ISMVL 2017: Multiple-valued logic

22-24 May 2017
Novi Sad, Serbia

CALL FOR PAPERS

  IEEE INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC (ISMVL 2017)
                                                      Novi Sad, Serbia
                                                     May 22 - 24, 2017

http://www.mvl.jpn.org/ISMVL2017/


The symposium will bring together researchers from computer science, 
engineering, mathematics, and further disciplines to discuss new 
developments and directions for future research in the area of 
multi-valued logic and related fields. Research papers, surveys, or 
tutorial papers on any subject in these areas are within the scope of the 
symposium.

You are invited to submit an original paper, survey, or tutorial paper on 
any subject in the area of multiple-valued logic, including but not 
limited to:

- Algebra and Formal Aspects
- Automatic Reasoning
- Logic Programming
- Philosophical Aspects of MVL
- Fuzzy Logic and Soft Computing
- Data Mining
- Machine Learning and Robotics
- Quantum Computing
- Reversible Computing
- Logic Design and Switching Theory
- Test and Verification
- Spectral Techniques
- Circuit/Device Implementation
- VLSI Architecture and Computing System-on-Chip Technology
- MVL Aspects of Nanotechnology
- MVL Aspects of Medical Technologies
- MVL Approaches to Big Data

The symposium committee is planning to hold a special session tribute to 
Ivan Stojmenovic in the symposium.

-------------------
   Accompanying Workshops
-------------------

26th International Workshop on Post-Binary ULSI Systems
Reed-Muller 2017 Workshop

-------------------
   Invited Speakers
-------------------

Dmitriy Zhuk, Moscow State University , Russia
Branislav Kisacanin, Nvidia Corporation, USA
Tsutomu Sasao, Meiji University, Japan

-------------------
   Important Dates
-------------------

Nov 1, 2016: Papers  submission
Feb 1, 2017: Author notification
Mar 1, 2017: Camera-ready copies
May 21, 2017: ULSI Workshop
May 22-24, 2017: ISMVL 2017
May 25, 2017: Reed-Muller Workshop, 2017

---------------------
   Symposium Co-Chairs
---------------------

Jovanka Pantovic, University of Novi Sad, Serbia
Radomir Stankovic, University of Nis, Serbia

-----------------------------
   Program Chairs
-----------------------------

Elena Dubrova, Royal Institute of Technology, Sweden, PC Chair
Felip Manya, IIIA-CSIC, Spain, PC Co-Chair
Shinobu Nagayama, Hiroshima City University, Japan, PC Co-Chair

-----------------------------
   Program Committee Members
-----------------------------

Aguzzoli, Stefano, The University of Milan, Italy
Cintula, Petr, The Czech Academy of Sciences, Czech Republic
Couceiro, Miguel, Université de Lorraine, France
Drechsler, Rolf, TU Wien, Austria
Dueck, Gerhard, University of New Brunswick, Canada
Fermuller, Christian, Royal Military College of Canada, Canada
Gaudet, Vincent C., University of Waterloo, Canada
Haddad, Lucien, Royal Military College of Canada, Canada
Hirayama, Takashi, Iwate University, Japan
Homma, Naofumi, Tohoku University, Japan
Kawaguchi, Mayuka F., Hokkaido University, Japan
Lukac, Martin, Nazarbayev University, Kazakhstan
Machida, Hajime, International Christian University, Japan
Onizawa, Naoya, Tohoku University, Japan
Paseka, Jan, Masaryk University, Czech Republic
Sasao, Tsutomu, Meiji University, Japan
Simovici, Dan, University of Massachusetts Boston, USA
Soeken, Mathias, École Polytechnique Fédérale de Lausanne, Switzerland
Tanno, Koichi, University of Miyazaki, Japan
Thornton, Mitch, Southern Methodist University, USA
Valeriote, Matt, McMaster University, Canada
Waldhauser, Tamas, University of Szeged, Hungary
Wille, Robert, University of Bremen, Germany
Winstead, Chris, Utah State University, USA
Yuminaka, Yasushi, Gunma University, Japan

---------------
   Paper Submission
---------------

Authors should submit papers as PDF files following the IEEE style 
guidelines for conference proceedings 
<http://www.ieee.org/conferences_events/conferences/publishing/templates.html>. 
Each manuscript shall include a 50-100 word abstract and shall not exceed 
6 pages. All accepted papers will be published by IEEE.

You can submit your papers via the following link: 
https://easychair.org/account/signin.cgi?key=43250904.NtVELjJes8PL5y2s 
<https://easychair.org/account/signin.cgi?key=43250904.NtVELjJes8PL5y2s>

Special issues in the following Journals are planned for selected ISMVL 2017 papers.
   » the Journal of Multiple-Valued Logic and Soft Computing
   <http://www.oldcitypublishing.com/journals/mvlsc-home/> » the Elsevier
   Journal of Applied Logic
   <http://www.journals.elsevier.com/journal-of-applied-logic>



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